P-channel Metal Oxide Semiconductor (PMOS) Field Effect Transistors (FETs) with p+ doped polysilicon gates and Nitrided Gate Oxides (NGOX) have been found to exhibit Negative Bias Temperature Instability (NBTI) after voltage and/or temperature aging. This instability gives rise to the problems that under negative gate bias voltage, the magnitude of threshold voltage (VT) of the FET increases and drain saturation current (IDS) decreases. This mechanism is known to cause degradation of performance of the PMOS FETs over time.
Prior technologies using single doped polysilicon gates and pure silicon dioxide (SiO2) gate oxides do not exhibit a NBTI problem. Thus, causes of and problems resulting from NBTI have not, up to now, been fully recognized or techniques to solve the problem been developed.
One mechanism proposed in the literature as giving rise to the NBTI problem, is illustrated in FIGS. 1A to 1C. Briefly, interface traps (NIT) are generated at the NGOX interface 102 by hole-assisted rupture of Si—H bonds by a free holes 104. The holes 104 can be either supplied by a channel charge during operation of the PMOS FETs or by tunneling through the NGOX. FIG. IA illustrates hole-tunneling by a hole 104 through the NGOX interface 102. FIG. 1B illustrates hole-capture of the hole 104 by the Si—H bond at the NGOX interface 102. FIG. 1C illustrates a broken Si—H bond resulting from the hole-capture shown in FIG. 1B.
The reaction pathways illustrated in FIGS. 1A to 1C may be summarized by the following equations:Si—H+h=Si++H0,H0+H0═H2; andSi—H+h+H0═Si++H2.where Si—H is the unbroken silicon-hydrogen bond, h is a free hole, Si+ is a silicon ion created by the breaking of the silicon-hydrogen bond, H0 is a hydrogen ion or atomic hydrogen created by the breaking of the silicon-hydrogen bond, and H2 is gaseous hydrogen formed and released by the ongoing reaction.
It will be appreciated that NIT generation is proportional to the hole density, and as NIT increases so does the tunneling probability and capture cross section.
The result of the above described reaction is the degradation of the PMOS transistor due to positive interface charge associated with broken Si—H bonds. The degradation is temperature, bias and process dependent. Moreover, the degradation caused by NBTI increases with the strength of the electric field applied across the NGOX. Thus, the NBTI problem becomes worse with each successive generation of PMOS FETs as the gate oxide thickness is aggressively reduced. In addition the incorporation of Nitrogen at the gate oxide interface to lower the susceptibility against boron penetration has deteriorated the gate oxide interface quality and hence amplified the NBTI related transistor degradation.
Heretofore efforts at addressing the NBTI problem have focused on processing techniques to getter or isolate hydrogen and water from the gate oxide layer. This approach has not proven wholly satisfactory for a number of reasons, including: (i) the cost associated with additional process steps; (ii) the incompatibility of the gettering and barrier materials with existing processes; and (iii) the limited effectiveness of these materials.
Accordingly, there is a need for a design solution or a regulator and method of operating the same to significantly reduce NBTI degradation in regulated circuits. It is further desirable that the regulator and method work to mitigate or reduce degradation in regulated circuits arising from causes other than NBTI.
The present invention provides a solution to these and other problems, and offers further advantages over conventional complementary (CMOS) circuits.